Related Concepts: 5.01 Sequential Logic Fundamentals, Latches & Flip-Flops (SR & JK) | 5.02 Flip-Flop Variants (Master-Slave JK, T & D Flip-Flops) & Triggering Mechanics | 5.04 Synchronous Sequential Circuit Analysis & Synthesis
5.03 Flip-Flop Conversions & Functional Transformation Mechanics
Conversion questions, all 10–13 marks
Question Years Marks Convert an S-R flip-flop to a J-K flip-flop 2017, 2018 10 Convert a J-K flip-flop to an S-R flip-flop 2024 12 Show that tying the two external JK inputs together forms a D flip-flop (part iv of the 2024 tables question) 2024 part of 13 ”JK flip-flop is the refinement of RS flip-flop” — justify 2023 (11), 2025 (09) 9–11 All four reduce to the same 4-step algorithm in §1: required excitation → available excitation → K-map → conversion logic.
Overview: Flip-flop conversion is the process of synthesizing combinational drive logic to convert an available Source Flip-Flop into a desired Target Flip-Flop. This systematic design technique allows any flip-flop type (SR, JK, D, or T) to emulate the operational characteristics of any other flip-flop type.
1. The Systematic 4-Step Conversion Algorithm
The conversion process follows a structured methodology: construct a combined conversion table, append source flip-flop excitation requirements, derive drive logic via K-Maps, and finally draw the logic diagram.
2. SR-to-JK Flip-Flop Conversion
Exam Problem (PYQ 2017, 2018 — 10 marks)
Question (verbatim): Convert an S-R flip-flop to a J-K flip-flop.
• Available (Source) FF: SR Flip-Flop
• Desired (Target) FF: JK Flip-Flop
2.1 Conversion Table
| Target Inputs (J, K) | Present State (Qn) | Next State (Qn+1) | Source SR Excitation (S, R) |
|---|---|---|---|
| 0 0 | 0 | 0 | 0 X |
| 0 0 | 1 | 1 | X 0 |
| 0 1 | 0 | 0 | 0 X |
| 0 1 | 1 | 0 | 0 1 |
| 1 0 | 0 | 1 | 1 0 |
| 1 0 | 1 | 1 | X 0 |
| 1 1 | 0 | 1 | 1 0 |
| 1 1 | 1 | 0 | 0 1 |
2.2 K-Map Optimization for Drive Inputs S and R
1. For Input S(J, K, Qn): Grouping minterm m4 (100) and m6 (110) yields: S = J · Qn’
2. For Input R(J, K, Qn): Grouping minterm m3 (011) and m7 (111) yields: R = K · Qn
2.3 Synthesized Circuit Schematic
The SR flip-flop is driven by two 2-input AND gates where J is ANDed with Q’ to drive S, and K is ANDed with Q to drive R.
3. JK-to-SR Flip-Flop Conversion
Exam Problem (PYQ 2024 — 12 marks)
Question (verbatim): Convert a J-K flip-flop to a S-R flip-flop.
This is the reverse of §2 and the answer is different — do not simply reuse the SR→JK result. Note also that is forbidden in SR, so those rows become don’t cares in the K-maps.
• Available (Source) FF: JK Flip-Flop
• Desired (Target) FF: SR Flip-Flop
3.1 Conversion Table
| Target Inputs (S, R) | Present State (Qn) | Next State (Qn+1) | Source JK Excitation (J, K) |
|---|---|---|---|
| 0 0 | 0 | 0 | 0 X |
| 0 0 | 1 | 1 | X 0 |
| 0 1 | 0 | 0 | 0 X |
| 0 1 | 1 | 0 | X 1 |
| 1 0 | 0 | 1 | 1 X |
| 1 0 | 1 | 1 | X 0 |
| 1 1 | 0 | X | X X |
| 1 1 | 1 | X | X X |
3.2 Drive Logic Equations
From K-map simplification: J = S and K = R.
Practical Insight: Since J = S and K = R, connecting S directly to J and R directly to K transforms a JK flip-flop into an SR flip-flop without requiring any external logic gates!
4. JK-to-D & JK-to-T Conversions
Exam Problem (PYQ 2024 — part iv of a 13-mark question)
Question (verbatim): …(iv) Show that tying the two external inputs together forms a D flip-flop.
Careful — the standard result differs. Tying and directly together () gives a T (toggle) flip-flop. To obtain a D flip-flop you tie and — i.e. connected through an inverter. Show both and state which the question means; if the paper says “tied together” and asks for D, note the inverter explicitly.
4.1 Converting JK to D Flip-Flop
Goal: Force J = D and K = D’. Drive Equations: J = D and K = D’. Implementation: Pass D directly to J, and pass D through a NOT gate to K.
4.2 Converting JK to T Flip-Flop
Goal: Force J = T and K = T. Drive Equations: J = T and K = T. Implementation: Tie J and K together and connect them to a common input signal T.
5. Master Summary Table of Conversion Equations
| Source FF | Target FF | Drive Logic Equations |
|---|---|---|
| SR | JK | S = J·Qn’, R = K·Qn |
| SR | D | S = D, R = D’ |
| SR | T | S = T·Qn’, R = T·Qn |
| JK | SR | J = S, K = R |
| JK | D | J = D, K = D’ |
| JK | T | J = T, K = T |
| D | T | D = T ⊕ Qn = T·Qn’ + T’·Qn |
| T | D | T = D ⊕ Qn = D·Qn’ + D’·Qn |
6. Past Year Master Questions & Solutions
PYQ Master Problem (2017, 2018): SR to JK Conversion
Question: Convert an S-R flip-flop to a J-K flip-flop. Show all conversion tables, K-maps, and final logic diagrams. [8 Marks]
Solution:
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Conversion Table Construction: Construct the 8-row table mapping target J,K and Qn to source S,R excitations (Section 2.1).
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K-Map Derivation: Show 3-variable K-maps for S and R: S(J,K,Qn) = J·Qn’ and R(J,K,Qn) = K·Qn.
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Circuit Diagram: Draw the SR flip-flop driven by two 2-input AND gates (Section 2.3).