Related Concepts: 01 Digital Systems & Signal Propagation | 03 BJT as NOT Gate & Inverter Operation | 05 TTL Logic Families & Open Collector Bus Systems

4.02 Universal Logic Gates & 2-Level Implementations

What is a Universal Logic Gate?

A logic gate is classified as Universal if any arbitrary Boolean function or digital circuit can be constructed using only that single gate type, without requiring any other gate types.

Both NAND and NOR gates are Universal Gates.

graph TD
    subgraph 4-NAND Gate XOR Network
        InA[Input A] & InB[Input B] --> NAND1[NAND 1: Output N1 = AB']
        InA & NAND1 --> NAND2[NAND 2: Output N2 = A • N1 ']
        InB & NAND1 --> NAND3[NAND 3: Output N3 = B • N1 ']
        NAND2 & NAND3 --> NAND4[NAND 4: Output F = A ⊕ B]
    end

1. NAND & NOR Gate Realizations of Basic Gates

Target GateNAND Gates RequiredNOR Gates Required
NOT1 (inputs tied: )1 (inputs tied: )
AND2 ()3 ()
OR3 ()2 ()
XOR4 (cascaded 4-NAND network)5 (4-NOR XNOR + 1 NOR Inverter)
XNOR5 (4-NAND XOR + 1 NAND Inverter)4 (cascaded 4-NOR network)

2. Two-Level Gate Implementation Rules

A. Two-Level NAND-NAND Implementation (SOP)

  • Rule: Any function in Sum of Products (SOP) form can be directly implemented using a 2-level NAND-NAND circuit.
  • Proof: . This represents a final NAND gate taking inputs from two level-1 NAND gates.
  • Direct Literals Rule: If a single literal (e.g., ) feeds directly into the second-level OR/NAND gate, it must be complemented () to cancel out the output gate’s inversion.

B. Two-Level NOR-NOR Implementation (POS)

  • Rule: Any function in Product of Sums (POS) form can be directly implemented using a 2-level NOR-NOR circuit.
  • Proof: . This represents a final NOR gate taking inputs from two level-1 NOR gates.

3. Major Exam Proofs

Major PYQ Proof: 5-Gate NOR XOR Circuit (2015, 2021 - 8 Marks)

Question: Show mathematically that a 5-gate NOR network acts as an Exclusive-OR (XOR) gate.

Proof Solution:


PYQ Master Design (2015): The 2-NOR Gate Limit Puzzle

Question: Implement , with don’t cares , using no more than Two NOR gates. Assume normal and complement inputs are available.

Step 1: Expand into Minterms We translate the raw algebra into decimal minterms to safely plot a K-map:

  • Minterms =
  • Don’t Cares =

Step 2: Group the Zeros () for NOR Logic Because a NOR gate generates inverted OR logic , we simplify for (the zeros on the K-map). The zeros are remaining cells: .

  • Grouping with creates an 8-cell block:
  • Grouping with creates a pair:
  • Simplified complement:

Step 3: The 2-NOR Implementation Double complementing gives :

  • NOR Gate 1: Feed and into the first NOR gate:
  • NOR Gate 2: Feed and into the second NOR gate:

Proof Complete: Implemented using exactly two NOR gates!


Past Year Questions (PYQs)

  • [PYQ 2021]: Prove NOR is a universal gate with basic gate implementations. (08 Marks)
  • [PYQ 2015, 2021]: 5-gate NOR XOR circuit proof. (08 Marks)
  • [PYQ 2015, 2021]: Implement with no more than two NOR gates. (12 Marks)