_ece lab prep compact

Related Concepts: Lab 6 complement power analysis | jfet lab report | lab 7 darlington

In detailed:

1. Exercise 14: Common emitter Circuit
2. Exercise 15: common collector Circuit (Emitter Follower)
3. Exercise 16: rc coupling
4. Exercise 18: direct coupling
5. Exercise 23: complementary power amplifier
6. Exercise 15: Darlington Pair
7. Exercise 6: MOSFET Voltage Amplifier
8. Exercise 3: JFET Voltage Amplifier

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Experiment 14: Common Emitter (CE) Circuit

(Source: Lab Manual, pp. 14-1 to 14-5)

Objective:

• To measure DC operating voltages ($V_B,V_E,V_C$) and verify proper biasing.
• To measure voltage gain ($A_v$) with and without a load.
• To observe the phase relationship between input and output.

How we did it (Steps):

1. Circuit Setup: Built a circuit using an NPN transistor (2N2219), voltage divider bias ($R_1,R_2$), and collector/emitter resistors.
2. DC Analysis: Measured voltages with no AC signal.
   • Verified $V_{BE}\approx 0.6V-0.7V$ (Forward bias).
   • Verified $V_{CE}$ was roughly half of $V_{CC}$ (Active region operation).
3. AC Analysis: Applied a small sine wave (1kHz, 100mV p-p) to the base via a coupling capacitor.
4. Measurement: Used an oscilloscope to compare the input signal (Channel 1) vs. the output signal at the collector (Channel 2).

Outcome:

• Amplification: The output voltage was significantly larger than the input voltage ($A_v>1$).
• Phase Shift: The output waveform was 180° out of phase (inverted) relative to the input.
• Loading: When a load resistor was attached, the gain decreased.

Why (Theory):

• Inversion: In a CE configuration, when the input (base) voltage rises, base current rises $\to$ collector current ($I_C$) rises. As $I_C$ rises, the voltage drop across the collector resistor ($I_C{R}_C$) increases, which pulls the collector voltage ($V_C$) down. Hence, positive input = negative output swing.
• Gain: The gain is roughly $R_C/R_E$ (if bypassed). It provides both voltage and current gain.

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Experiment 15: Common Collector (CC) Circuit (Emitter Follower)

(Source: Lab Manual, pp. 15-1 to 15-5)

Objective:

• To demonstrate that voltage gain is less than unity ($\approx 1$).
• To verify high input impedance and low output impedance.
• To observe the phase relationship.

How we did it (Steps):

1. Circuit Setup: Input applied to the Base; Output taken from the Emitter.
2. Measurement: Applied AC signal to the base. Measured the output signal across the emitter load resistor.
3. Impedance Test: A variable resistor was likely used in series/parallel to determine input/output impedance by finding the half-voltage point.

Outcome:

• Gain: $A_v\approx 0.98$ to $0.99$ (Unity gain). It did not amplify voltage.
• Phase: Input and Output were in-phase (0° shift).
• Impedance: The circuit showed very high input impedance and low output impedance.

Why (Theory):

• Follower Action: The emitter voltage follows the base voltage (minus the constant 0.7V diode drop). Since $V_E\approx V_B-0.7V$, any AC change in $V_B$ appears directly at $V_E$ without inversion.
• Application: Used as a Buffer or impedance matching device (connecting a high Z source to a low Z load) because it prevents loading effects.

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Experiment 15 (Part 2): Darlington Pair

(Source: Lab Manual, pp. 15-1 to 15-5, distinct section)

Objective:

• To verify that the current gain ($\beta$) of a Darlington pair is much higher than a single transistor.
• To measure the extremely high input impedance.

How we did it (Steps):

1. Construction: Connected two transistors such that the emitter of the first feeds the base of the second. Collectors were tied together.
2. Measurement: Measured base current ($I_B$) and emitter current ($I_E$) to calculate gain.

Outcome:

• Current Gain: The total current gain was massive (product of individual betas: ${\beta }_{Total}\approx {\beta }_1\times {\beta }_2$).
• Input Impedance: Extremely high compared to single-stage amplifiers.

Why (Theory):

• The first transistor acts as an emitter follower driving the second transistor. The input resistance is reflected as $Z_{in}\approx {\beta }_1{\beta }_2{R}_E$. This makes it ideal for measuring very weak currents or interfacing with high-impedance sensors.

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Experiment 16: RC Coupling (Cascaded Amplifier)

(Source: Lab Manual, pp. 16-1 to 16-6)

Objective:

• To identify a two-stage amplifier connected via capacitors.
• To measure the loaded voltage gain of each stage and the total gain.
• To determine the frequency response.

How we did it (Steps):

1. Setup: Built two CE stages. The output (collector) of Stage 1 was connected to the input (base) of Stage 2 via a coupling capacitor.
2. Gain Measurement: Measured $V_{in}$, output of Stage 1, and final output of Stage 2.
3. Frequency Sweep: Varied the input frequency (20Hz to 100kHz) and plotted the output voltage.

Outcome:

• Total Gain: The total gain was the product of individual gains ($A_{total}=A_1\times A_2$).
• Loading Effect: The gain of Stage 1 was lower than when it stood alone because the input impedance of Stage 2 acted as a load on Stage 1.
• Frequency Response: Gain dropped off at low frequencies (due to capacitors) and high frequencies (due to transistor capacitance).

Why (Theory):

• Capacitor Role: The coupling capacitor blocks DC (preventing Stage 1’s bias voltage from messing up Stage 2’s bias) but passes AC signals.
• Phase: Each CE stage shifts 180°. Two stages result in $180^{\circ }+180^{\circ }=360^{\circ }$ (or 0°), putting the final output back in-phase with the input.

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Experiment 18: Direct Coupling

(Source: Lab Manual, pp. 18-1 to 18-6)

Objective:

• To demonstrate an amplifier that can amplify low frequencies (down to DC).
• To observe the use of complementary transistors (NPN driving PNP).

How we did it (Steps):

1. Setup: The Collector of the first stage (NPN) was connected directly (wire, no capacitor) to the Base of the second stage (PNP).
2. DC Bias: DC potentials had to be carefully adjusted because the DC output of Stage 1 becomes the DC bias input for Stage 2.

Outcome:

• Frequency Response: The amplifier worked well at very low frequencies where RC coupled circuits failed.
• Stability: DC levels were more sensitive to drift (temperature changes).

Why (Theory):

• No Capacitors: Eliminating the coupling capacitor removes the reactance ($X_C=1/2\pi fC$) that blocks low frequencies.
• Complementary Pair: Using NPN then PNP allows the voltages to “stack” conveniently between the supply rails without needing complex level-shifting networks.

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Experiment 3: JFET Voltage Amplifier

(Source: Lab Manual, pp. 3-1 to 3-5)

Objective:

• To operate a voltage controlled device (JFET).
• To measure gain and phase shift in a Common Source configuration.

How we did it (Steps):

1. Bias: Used a Self-Bias configuration (Source resistor $R_S$ creates the bias voltage).
2. Check: Measured $V_{GS}$ to ensure it was negative (reverse biased).
3. AC Test: Applied signal to Gate, measured Output at Drain.

Outcome:

• Gain: Moderate voltage gain, dependent on transconductance ($g_m$).
• Input Z: Extremely high input impedance (almost no current drawn from signal source).
• Phase: 180° phase shift (Inverted output).

Why (Theory):

• Field Effect: The input voltage creates an electric field that pinches off the channel. No physical current flows into the gate ($I_G=0$), unlike the BJT which requires base current.
• Self-Bias: Current flowing through $R_S$ raises the Source voltage. Since Gate is at 0V, $V_{GS}$ becomes negative, which is required for N-channel JFET operation.

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Experiment 6: MOSFET Voltage Amplifier

(Source: Lab Manual, pp. 6-1 to 6-4)

Objective:

• To demonstrate Depletion-mode MOSFET operation.
• To show operation at Zero Bias.

How we did it (Steps):

1. Setup: Common Source amplifier using a Depletion MOSFET.
2. Bias: We could operate this with $V_{GS}=0V$ (Zero Bias) or standard biasing.
3. Measurement: Measured gain and phase.

Outcome:

• Flexibility: The MOSFET worked even without a negative bias voltage (unlike the JFET).
• Impedance: Ultra-high input impedance (higher than JFET).

Why (Theory):

• Structure: The Gate is insulated from the channel by Silicon Dioxide ($Si{O}_2$).
• Depletion Mode: The device is “Normally ON”. It has a physical channel even at 0V. We can swing positive (Enhancement) or negative (Depletion) around 0V, making biasing very simple.

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Experiment 23: Complementary Power Amplifier (Class AB)

(Source: Lab Manual, pp. 23-1 to 23-5)

Objective:

• To build a “Push-Pull” amplifier using NPN and PNP transistors.
• To eliminate Crossover Distortion.

How we did it (Steps):

1. Setup: Stacked an NPN (top) and PNP (bottom) transistor.
2. Diode Bias: Used two diodes (or resistors) between the bases of the transistors to create a 1.2V to 1.4V separation.
3. Operation: Applied AC. Observed output at the emitter junction.

Outcome:

• Efficiency: High efficiency (current only flows when signal is present).
• Distortion: Without the diodes, the output wave looked “squashed” at the zero crossing (Crossover Distortion). With diodes, the wave was smooth (Class AB).

Why (Theory):

• Push-Pull: NPN handles the positive half-cycle; PNP handles the negative half-cycle.
• Class AB: Transistors need 0.7V to turn on. Without bias, signals between -0.7V and +0.7V are lost (dead zone). The biasing diodes keep both transistors slightly “on” (trickle current) so they are ready to conduct immediately, eliminating the dead zone.