Related Concepts: 01 Digital Systems & Signal Propagation | 03 Logic Gate Characteristics & Buffer Gates

02 BJT as NOT Gate & Inverter Operation

Concept Overview

A Bipolar Junction Transistor (BJT) can be used as an electronic switch to perform the Boolean NOT (Inverter) logic operation.

Instead of operating in its active linear region {used for linear analog signal amplification}, the transistor is forced between two extreme non-linear operating states: the Cut-off region (OFF switch) and the Saturation region (ON switch).

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Circuit Configuration & Operating Diagram

To configure an NPN transistor as a logic inverter:

• Emitter ($E$): Connected directly to common ground ($0\text{V}$).
• Collector ($C$): Connected to supply voltage ($V_{CC}=+5\text{V}$) through collector resistor ($R_C$).
• Base ($B$): Connected to input voltage ($V_{in}$) through base resistor ($R_B$).
• Output ($V_{out}$): Extracted directly from the collector terminal ($V_C$).

            +Vcc (+5V)
              |
             [Rc]
              |
      Rb      +-----> Vout (Collector Terminal)
Vin -[===]---| B (NPN)
              \-> E 
              |
             GND (0V)

graph TD
    Vin{Input Voltage Vin} -->|Vin = LOW 0.2V| Cutoff[Cut-off Region: BE Junction Off]
    Vin -->|Vin = HIGH 5.0V| Sat[Saturation Region: BE Junction Heavily On]
    
    Cutoff -->|Ib = 0, Ic = 0| Open[Transistor Acts as Open Switch]
    Open -->|No drop across Rc| HighOut[Vout = Vcc = 5V HIGH]
    
    Sat -->|Ib Large, Ic = Ic-sat| Closed[Transistor Acts as Closed Switch]
    Closed -->|Vce = Vce-sat = 0.2V| LowOut[Vout = Vce-sat = 0.2V LOW]

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Principle of Inverter Operation

The circuit acts as an inverter because $V_{out}$ is always the logical complement of $V_{in}$:

1. Input is LOW (Logic 0) $\to$ Cut-off Region (OFF State)

• Condition: $V_{in}=\text{LOW}$ {voltage below cut-in threshold $V_{BE(\text{cut-in})}\approx 0.7\text{V}$ }.
• Base Current: The base-emitter PN junction is not forward-biased, so base current $I_B=0$.
• Transistor State: With $I_B=0$, collector current $I_C=\beta I_B=0$. The transistor acts as an open switch.
• Output Voltage: Since zero current flows through $R_C$, there is no voltage drop ($V_{R_C}=I_C{R}_C=0$).
• Logic Result: The output equals full supply voltage: $V_{out}=V_{CC}-I_C{R}_C=V_{CC}(\text{Logic 1 / HIGH})$
• Internal Resistance: Cut-off resistance is extremely high ($R_{\text{cut-off}}=\frac{V_{CE}}{I_{CEO}}\approx \infty$).

2. Input is HIGH (Logic 1) $\to$ Saturation Region (ON State)

• Condition: $V_{in}=\text{HIGH}$ {e.g., $+5\text{V}$ }.
• Base Current: The base-emitter junction is heavily forward-biased, drawing a large base current: $I_B=\frac{V_{in}-V_{BE(sat)}}{R_B}$
• Transistor State: The base current drives the BJT into saturation. The collector-emitter channel acts as a closed switch to ground.
• Output Voltage: Collector voltage drops to saturation voltage $V_{CE(sat)}$ (typically $0.2\text{V}$).
• Logic Result: Output voltage becomes minimal: $V_{out}=V_{CE(sat)}\approx 0.2\text{V}(\text{Logic 0 / LOW})$
• Internal Resistance: Saturation resistance is virtually zero ($R_{\text{sat}}\approx 0$).

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Mathematical Condition for Saturation

For the circuit to reliably operate as a digital switch, base current must be sufficient to drive collector current to its saturation limit ($I_{C(sat)}$).

The condition that MUST be satisfied is: $\beta I_B\ge I_{C(sat)}$ Where:

• $\beta$ (or $h_{fe}$) = Transistor DC current gain.
• $I_{C(sat)}=\frac{V_{CC}-V_{CE(sat)}}{R_C}\approx \frac{V_{CC}}{R_C}$ = Collector saturation current.

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Past Year Questions (PYQs) & Step-by-Step Solution

Standard Exam Verification Problem (2016 - 13 Marks, 2019 - 13 Marks)

Question: Show that the circuit behaves as an inverter with the following parameters: $R_c=1\text{ k}\Omega$, $R_b=22\text{ k}\Omega$, $V_{cc}=5\text{V}$, $h_{fe}=50$, $H=5\text{V}$ (High input), $L=0.2\text{V}$ (Low input), $V_{BE(sat)}=0.7\text{V}$, $V_{CE(sat)}=0.2\text{V}$.

Step-by-Step Proof Solution:

Step 1: Test LOW Input ($V_{in}=0.2\text{V}$)

• Since $V_{in}=0.2\text{V}<V_{BE(\text{cut-in})}\approx 0.7\text{V}$, the base-emitter junction is OFF.
• Base current $I_B=0⟹I_C=0$.
• Output $V_{out}=V_{CC}-I_C{R}_c=5\text{V}-(0)(1\text{k}\Omega )=5\text{V}\text{ (HIGH)}$.

Step 2: Test HIGH Input ($V_{in}=5\text{V}$)

• Calculate actual base current ($I_B$): $I_B=\frac{V_{in}-V_{BE(sat)}}{R_b}=\frac{5\text{V}-0.7\text{V}}{22\text{ k}\Omega }=\frac{4.3\text{V}}{22000\Omega }\approx 0.1955\text{ mA}=195.5\mu \text{A}$

Step 3: Calculate Collector Saturation Current ($I_{C(sat)}$)

• Calculate maximum collector current in saturation: $I_{C(sat)}=\frac{V_{cc}-V_{CE(sat)}}{R_c}=\frac{5\text{V}-0.2\text{V}}{1\text{ k}\Omega }=\frac{4.8\text{V}}{1000\Omega }=4.8\text{ mA}$

Step 4: Verify Saturation Condition ($\beta I_B\ge I_{C(sat)}$)

• Compute minimum collector current available from base drive: $\beta I_B=h_{fe}\cdot I_B=50\times 0.1955\text{ mA}=9.775\text{ mA}$
• Compare with saturation current: $9.775\text{ mA}\ge 4.8\text{ mA}⟹\beta I_B>I_{C(sat)}$
• Since $\beta I_B>I_{C(sat)}$, the transistor is driven heavily into saturation.
• Output voltage drops to $V_{out}=V_{CE(sat)}=0.2\text{V}\text{ (LOW)}$.

Conclusion: A LOW input ($0.2\text{V}$) yields a HIGH output ($5\text{V}$), and a HIGH input ($5\text{V}$) yields a LOW output ($0.2\text{V}$). Therefore, the BJT circuit is mathematically proven to operate as an inverter (NOT gate). $■$