Related Concepts: 02 Base Complements & Non-Decimal Arithmetic | 01 Advanced Base Conversions | 04 Error Control, Parity Generators & Checkers
1.03 The 8-Bit Two’s Complement Problem
Concept Overview: Signed Binary Systems
In computer hardware, there are no physical plus () or minus () signs. Signed numbers are represented by setting the Most Significant Bit (MSB) as the sign bit:
0in the MSB = Positive Number.1in the MSB = Negative Number.The Signed 2’s Complement System is the universal standard for computer arithmetic because subtraction is executed by adding the 2’s complement of the subtrahend:
graph TD Setup[Step 0: Setup Phase] --> DefineA[Define +A in 8-bit True Binary] Setup --> DefineNegA[Define -A via 2's Comp of +A] Setup --> DefineB[Define +B or -B in 8-bit Format] Setup --> DefineNegB[Define -B via 2's Comp of +B] DefineA & DefineNegA & DefineB & DefineNegB --> Addition[Perform 8-bit ADDITION ONLY] Addition --> CarryCheck{9th Bit Carry Generated?} CarryCheck -->|Yes| Discard[Discard 9th Bit] CarryCheck -->|No| CheckMSB Discard --> CheckMSB{Check 8th Bit MSB} CheckMSB -->|MSB = 0| PosResult[Result is Positive -> Convert Directly to Decimal] CheckMSB -->|MSB = 1| NegResult[Result is Negative -> Take 2's Comp of Sum and Add - Sign]
1. The Pre-Calculation Setup Methodology
Major Exam Problem: Computer Arithmetic ( , ) (2016, 2017, 2020, 2021, 2025 - 13 Marks)
Step 0: Pre-Calculation Operand Setup
Before computing the four cases (), express all four required terms () in clean 8-bit 2’s complement notation:
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Magnitudes in 8-bit Binary:
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Determining the 4 Operands:
- (MSB = 0, positive)
- Take 2’s comp of :
- Take 2’s comp of :
- (MSB = 0, positive)
2. Step-by-Step Solution for the 4 Arithmetic Cases
Output Evaluation Rules
- Discard 9th Bit: Any carry produced past the 8th bit {sign bit} is discarded.
- MSB Interpretation:
- MSB = 0: Result is positive. Convert directly from binary to decimal.
- MSB = 1: Result is negative. Take the 2’s complement of the sum to find magnitude, then attach a negative sign.
Case 1: Compute
00011001_2 \quad (+25) \\ + 11010000_2 \quad (-48) \\ \hline \mathbf{11101001_2} \end{array}$$ * **Evaluation:** No 9th bit. MSB is **1** $\implies$ Result is **negative**. * **Magnitude:** Take 2's complement of $11101001_2$: $$\text{1's comp} = 00010110_2 \implies \text{2's comp} = 00010111_2 \quad (23_{10})$$ $$\mathbf{\text{Final Answer: } -23_{10}} \quad \text{*(Verification: } 25 + (-48) = -23\text{*)}$$ --- ### Case 2: Compute $A - B$ Express as $A + (-B) \implies \text{Add } A \ (00011001_2) + (-B) \ (00110000_2)$: $$\begin{array}{r@{\quad}l} 00011001_2 \quad (+25) \\ + 00110000_2 \quad (+48) \\ \hline \mathbf{01001001_2} \end{array}$$ * **Evaluation:** MSB is **0** $\implies$ Result is **positive**. * **Magnitude:** Direct conversion: $01001001_2 = 64 + 8 + 1 = 73_{10}$. $$\mathbf{\text{Final Answer: } +73_{10}} \quad \text{*(Verification: } 25 - (-48) = 73\text{*)}$$ --- ### Case 3: Compute $B - A$ Express as $B + (-A) \implies \text{Add } B \ (11010000_2) + (-A) \ (11100111_2)$: $$\begin{array}{r@{\quad}l} 11010000_2 \quad (-48) \\ + 11100111_2 \quad (-25) \\ \hline (1)\ \mathbf{10110111_2} \end{array}$$ * **Evaluation:** 9th bit carry generated $\implies$ **Discard 9th bit**. * Remaining 8-bit sum is $10110111_2$. MSB is **1** $\implies$ Result is **negative**. * **Magnitude:** Take 2's complement of $10110111_2$: $$\text{1's comp} = 01001000_2 \implies \text{2's comp} = 01001001_2 \quad (73_{10})$$ $$\mathbf{\text{Final Answer: } -73_{10}} \quad \text{*(Verification: } -48 - 25 = -73\text{*)}$$ --- ### Case 4: Compute $-A - B$ Express as $(-A) + (-B) \implies \text{Add } (-A) \ (11100111_2) + (-B) \ (00110000_2)$: $$\begin{array}{r@{\quad}l} 11100111_2 \quad (-25) \\ + 00110000_2 \quad (+48) \\ \hline (1)\ \mathbf{00010111_2} \end{array}$$ * **Evaluation:** 9th bit carry generated $\implies$ **Discard 9th bit**. * Remaining 8-bit sum is $00010111_2$. MSB is **0** $\implies$ Result is **positive**. * **Magnitude:** Direct conversion: $00010111_2 = 16 + 4 + 2 + 1 = 23_{10}$. $$\mathbf{\text{Final Answer: } +23_{10}} \quad \text{*(Verification: } -25 - (-48) = 23\text{*)} \quad \blacksquare$$ --- ## 3. Arithmetic Overflow Detection Rules > [!warning] Hardware Overflow Conditions > > An 8-bit signed system can only represent numbers in the range **$-128$ to $+127$**. If an operation produces a value outside this range, an **Overflow** occurs. > > **Detection Rules:** > 1. Adding two **positive** numbers ($MSB_1 = 0, MSB_2 = 0$) yields a **negative** sum ($MSB_{sum} = 1$). > 2. Adding two **negative** numbers ($MSB_1 = 1, MSB_2 = 1$) yields a **positive** sum ($MSB_{sum} = 0$). > 3. *Note:* Adding numbers of opposite signs can **never** cause an overflow. > > > [!note] Concept Resolution: Why can adding opposite signs never cause an overflow? > > Let's analyze this mathematically. In an 8-bit signed system: > > - Positive numbers ($X$) range from $0$ to $+127$. > > - Negative numbers ($Y$) range from $-1$ to $-128$. > > > > When we add opposite signs ($X + Y$): > > - The **maximum possible sum** occurs at $X = +127$ and $Y = -1$, yielding $+126$ (valid, $\le +127$). > > - The **minimum possible sum** occurs at $X = 0$ and $Y = -128$, yielding $-128$ (valid, $\ge -128$). > > > > Therefore, the sum is mathematically guaranteed to fall between $-128$ and $+126$, which fits within the 8-bit range. > > > > **What about the "difference" being > 127?** > > The confusion lies between **addition** and **subtraction**: > > - **Addition of opposite signs:** $100 + (-50) = 50$ (safe, absolute magnitude decreases). > > - **Subtraction of opposite signs:** $100 - (-50) = 150$ (overflows, but this is equivalent to adding two positive numbers: $+100$ and $+50$, which violates the "opposite sign addition" rule). --- > [!question] Past Year Questions (PYQs) > > * **[PYQ 2016, 2017, 2020, 2021, 2025]:** Given integer variables $A = (25)_{10}$ and $B = -(48)_{10}$ (or $A=25, B=-46$), show how an 8-bit two's complement computer computes $A+B$, $A-B$, $B-A$, and $-A-B$. (12 to 13 Marks)