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📘 ECE 2103 - Master Checklist (Instructor 2)
📝 Chapter 5: Sequential Logic Circuits & Flip-Flops
- Sequential Logic Fundamentals
- Distinguish between combinational and sequential circuits. [PYQ 2023, 2024, 2025]
- Why is a flip-flop called a one-bit memory element? [PYQ 2018, 2023, 2024, 2025]
- Define state table, state diagram, state equation, and register. [PYQ 2015, 2016, 2021, 2022]
- Draw the block diagram of a generic sequential circuit. [PYQ 2017, 2019]
- Flip-Flop Characteristics & Operation
- Draw diagrams, Characteristic Tables, and Excitation Tables for RS, JK, D, and T flip-flops. [PYQ heavily tested: 2015–2022]
- Derive characteristic equations for RS, JK, D, and T flip-flops.
- Show the operation of a D-type edge-triggered flip-flop with necessary diagrams. [PYQ 2015, 2016, 2017, 2019, 2022]
- Draw the logic diagram of a clocked master-slave JK flip-flop using NAND gates. [PYQ 2015, 2019]
- Concept: “JK flip-flop is the refinement of RS flip-flop” - Justify. [PYQ 2023, 2025]
- Flip-Flop Conversions & Timing
- Convert an S-R flip-flop to a J-K flip-flop. [PYQ 2017, 2018]
- Convert a J-K flip-flop to an S-R flip-flop. [PYQ 2024]
- Show that tying the two external inputs of a JK flip-flop together forms a T or D flip-flop. [PYQ 2024]
- Define the “Race around condition” in JK flip-flops. Why does it occur and how is it resolved? [PYQ 2017, 2020, 2021]
- Sequential Circuit Design & Analysis
- Mention the procedures to design a sequential circuit. [PYQ 2024]
- Analyze a given logic circuit with flip-flops to extract the state table and draw the state diagram. [PYQ 2015, 2016, 2019, 2020, 2022]
- Design sequential circuits from given State Equations (e.g., ) using specific flip-flops. [PYQ 2021, 2023, 2024, 2025]
- Design a Serial Adder using a sequential logic procedure. [PYQ 2019]
- State Reduction
- Write down the State Reduction algorithm. [PYQ 2015, 2016, 2018]
- Reduce the number of states in a given state table and tabulate the reduced state table. [PYQ heavily tested: 2016, 2018, 2022, 2023, 2024, 2025]
- From a reduced state table, find the output sequence generated by a specific input sequence (e.g.,
01110010011). [PYQ 2016, 2024]
📝 Chapter 6: Registers and Counters
- Registers & Data Transfer
- What is a register? Design a 4-bit register with parallel load using D flip-flops and external gates. [PYQ 2015, 2016, 2017, 2021, 2023, 2025]
- Explain the difference between serial and parallel transfer. What type of register is used in each case? [PYQ 2018]
- Shift Register Numericals
- Track register contents serially: An initial register (e.g.,
1101or10110) is shifted right times with a specific serial input string. Determine the content after each shift. [PYQ heavily tested: 2017–2025] - Track cascading shift registers (Register A feeds into Register B) over a given number of clock pulses. [PYQ 2016, 2019, 2022]
- Track register contents serially: An initial register (e.g.,
- Counter Fundamentals
- What is a ripple counter? [PYQ 2018, 2022, 2023, 2025]
- Calculate maximum delay and maximum frequency in a ripple counter (e.g., 10-bit counter using flip-flops with 20-ns delay). [PYQ 2018]
- Synchronous Counter Design
- Sequence Counters: Design a counter that counts a specific irregular sequence (e.g., 15-10-9-8-7-6 or 15-11-9-8-4-6-1) and repeats using JK or T flip-flops. [PYQ heavily tested: 2015, 2016, 2020, 2022, 2023, 2024, 2025]
- Code Counters: Design a counter that counts decimal digits according to the 84-2-1 code using T flip-flops. [PYQ 2016, 2017, 2020]
- Code Counters: Design a counter that counts decimal digits according to the Excess-3 code using minimum J-K or T flip-flops. [PYQ 2019, 2022, 2024, 2025]
- Design a standard BCD counter using JK flip-flops. [PYQ 2019]
- Specialized Counters
- Draw the diagram of a 4-bit synchronous binary up-down counter. [PYQ 2018, 2021, 2022, 2023, 2025]
- Construct a Johnson Counter with 10 timing signals. [PYQ 2015, 2018, 2019, 2025]
- Design a Mod-6 counter using a generic counter IC with parallel load. [PYQ 2017, 2021]
📝 Chapter 7: Memory Elements and Data Converters
- Memory Elements
- Define a memory element. [PYQ 2018, 2022, 2023, 2024, 2025]
- Explain the information transfer process in a magnetic core memory during write (and read) operations. [PYQ 2018, 2020, 2021, 2022, 2023, 2024, 2025]
- Write short notes on EPROM and E²PROM. [PYQ 2018, 2021, 2023, 2024]
- Analog-to-Digital (A/D) Converters
- Dual Slope A/D: Draw the circuit and mathematically prove that the output of the converter is directly proportional to the analog input voltage. [PYQ heavily tested: 2016, 2018, 2019, 2020, 2021, 2022, 2023, 2024]
- Successive Approximation A/D: Show the process with necessary diagrams. [PYQ 2018]
- Successive Approximation A/D Design: Design a converter to find an unknown weight in the range 0 to 1 kg using a balance and weights of 1/2, 1/4, and 1/8 kg. [PYQ 2021, 2023]
- Digital-to-Analog (D/A) Converters
- Define and understand: (i) Resolution, (ii) Accuracy, (iii) Settling time. [PYQ 2024]
- Compare/write down the differences between the R-2R ladder and the weighted-resistor D/A converter. [PYQ 2018, 2019, 2020, 2022, 2023]
- R-2R Ladder Proof: Prove that the analog output voltage is proportional to the digital input. [PYQ 2024]
How would you like to proceed? We can tackle these sequentially starting with Latches & Flip-Flops, or we can jump straight into the heavily tested numericals like State Reduction or Shift Register sequence tracking!