shafrim mam checklist

Chapter 4: Operational Amplifiers (Op-Amps) - Basics & Applications

Definitions & Core Terminology

• Define the term “Operational Amplifier” (Op-Amp). [PYQ: 2017, 2020, 2024, 2025] [Heavily Tested]
• Define the term “Input Offset Voltage” as it applies to Op-Amps. [PYQ: 2015, 2023, 2025] [Heavily Tested]
• Define the term “Input Offset Current.” [PYQ: 2015]
• Define the term “Input Bias Current.” [PYQ: 2015]
• Define the term “Slew Rate” of an Op-Amp. [PYQ: 2015, 2021, 2022] [Heavily Tested]
• Define the Common-Mode Rejection Ratio (CMRR) of an Op-Amp. [PYQ: 2015, 2016, 2017, 2018, 2021, 2022] [Heavily Tested]
• Define the concept of “Virtual Ground” for an inverting amplifier configuration. [PYQ: 2015, 2017, 2021] [Heavily Tested]
• Define the concept of “Virtual Short” for a non-inverting amplifier configuration. [PYQ: 2017, 2021]
• Define the term “Integrator Circuit” as used in operational amplifier configurations. [PYQ: 2023]
• Define the terms “Common Mode Gain” ($A_{cm}$) and “Differential Gain” ($A_d$) of an Op-Amp. [PYQ: 2019]
• Define “Integrated Circuit” (IC). [PYQ: 2016]

Theorems & Laws

• State and explain the golden rules/ideal electrical characteristics of an ideal Op-Amp (infinite input impedance, zero output impedance, infinite open-loop gain, infinite CMRR, and infinite slew rate) and write down the practical benefits of having these. [PYQ: 2016, 2018, 2019, 2021, 2023] [Heavily Tested]

Core Principles & Explanations

• Explain the single-ended and double-ended operations of an Op-Amp using input voltage configurations. [PYQ: 2015, 2017]
• Explain the offset voltage adjustment process to null the output of a practical Op-Amp. [PYQ: 2023, 2025]
• Explain why an open-loop Op-Amp is not suitable for linear applications. [PYQ: 2017]
• Explain why negative feedback is practical for linear applications of Op-Amps, and state the applications of positive feedback. [PYQ: 2017, 2019]
• Explain the statement: “Negative feedback in Op-Amp stabilizes gain but increases bandwidth.” [PYQ: 2025]
• Explain when a non-inverting amplifier is called a “voltage follower” and discuss its design benefits. [PYQ: 2018]
• Explain the practical problems associated with a basic differentiator circuit (noise susceptibility and instability at high frequencies). [PYQ: 2021, 2023]
• Explain the process of reducing high-frequency noise and instability in a practical differentiator circuit using series limiting resistors and parallel capacitors. [PYQ: 2023]
• Explain the operation of an averaging amplifier utilizing a non-inverting configuration of an Op-Amp. [PYQ: 2023, 2025]
• Explain the limitations of a basic integrator circuit and how practical integrators solve them using parallel feedback resistors. [PYQ: 2024]
• Explain the four basic building blocks of a typical Op-Amp architecture. [PYQ: 2018, 2021]
• Explain how an Op-Amp acts as a switching circuit when operating in open-loop or non-linear modes. [PYQ: 2024]

Derivations

• Derive the expression for the closed-loop voltage gain ($A_f=1+\frac{R_F}{R_1}$) of a non-inverting amplifier configuration. [PYQ: 2015]
• Derive the expression for the closed-loop voltage gain ($A_f=-\frac{R_F}{R_1}$) of an inverting amplifier configuration. [PYQ: 2021, 2022]
• Derive the expression for scaling operation using an inverting Op-Amp configuration and evaluate if multiplication can be performed in this setup. [PYQ: 2024]
• Derive the output voltage equation of a basic differentiator in terms of its $RC$ components and input signal. [PYQ: 2025]
• Derive the output voltage equation of a basic integrator circuit in terms of its $RC$ components and input signal. [PYQ: 2020, 2021, 2023] [Heavily Tested]

Proofs

• Prove that the closed-loop voltage gain of a non-inverting Op-Amp amplifier is lower than its open-loop voltage gain. [PYQ: 2018, 2022]
• Prove mathematically that, depending on the relationship between the feedback resistor ($R_F$) and input resistors ($R_a$, $R_b$, $R_c$), a multi-input Op-Amp circuit can be used as a summing amplifier, a scaling amplifier, or an averaging amplifier. [PYQ: 2017]

Comparison/Difference Tables

• Differentiate between inverting and differential summing amplifiers in a comparative table. [PYQ: 2016]
• Differentiate between inverting and non-inverting averaging amplifiers in a comparative table. [PYQ: 2016]
• Compare the closed-loop gain of inverting vs. non-inverting amplifier configurations under the same resistor values. [PYQ: 2025]

Diagrams & Circuits

• Draw the equivalent circuit of an Op-Amp. [PYQ: 2019, 2020, 2022, 2024, 2025] [Heavily Tested]
• Draw the ideal voltage transfer curve of an Op-Amp. [PYQ: 2019, 2022]
• Draw the three open-loop configurations of an Op-Amp acting as a high-gain amplifier. [PYQ: 2025]
• Draw the circuit schematic of a basic differentiator. [PYQ: 2021, 2023, 2025] [Heavily Tested]
• Draw the circuit schematic of a practical differentiator containing parallel stabilizing elements. [PYQ: 2023]
• Draw the circuit schematic of a basic integrator. [PYQ: 2017, 2020, 2021] [Heavily Tested]
• Draw the circuit schematic of a practical integrator containing a parallel feedback resistor. [PYQ: 2024]
• Draw the block diagram of the four basic building blocks of an Op-Amp. [PYQ: 2018, 2021]
• Draw the circuit diagram of a voltage follower. [PYQ: 2018, 2024]

Numericals & Calculations

• Solve for closed-loop parameters $A_F,R_{iF},R_{oF},f_F$, and total output offset voltage $V_{ooT}$ for a 741C non-inverting amplifier given: $R_1=1\text{ k}\Omega ,R_F=10\text{ k}\Omega ,A=200,000,R_i=2\text{ M}\Omega ,R_o=75\Omega ,f_o=5\text{ Hz}$, supply voltage = $\pm 15\text{ V}$, and output voltage swing = $\pm 13\text{ V}$. [PYQ: 2015]
• Solve for closed-loop parameters $A_F,R_{iF},R_{oF},f_F$, and total output offset voltage $V_{ooT}$ for a 741C inverting amplifier given: $R_1=470\Omega ,R_F=4.7\text{ k}\Omega ,A=200,000,R_i=2\text{ M}\Omega ,R_o=75\Omega ,f_o\approx 5\text{ Hz}$, supply voltage = $\pm 15\text{ V}$, and output voltage swing = $\pm 13\text{ V}$. [PYQ: 2017]
• Solve for closed-loop parameters $A_F,R_{iF},R_{oF},f_F$, and total output offset voltage $V_{ooT}$ for a non-inverting amplifier configuration given: $A=400,000,R_1=470\Omega ,R_I=33\text{ M}\Omega ,R_F=4.7\text{ k}\Omega ,R_o=60\Omega$, supply voltage = $\pm 15\text{ V}$, maximum output voltage swing = $\pm 13\text{ V}$, and unity-gain bandwidth (UGB) = $0.6\text{ MHz}$. [PYQ: 2020]
• Analyze the circuit of Fig. 5(b) to: (i) name the feedback topology and calculate the feedback factor, (ii) calculate the voltage gain $V_o/V_i$, and (iii) draw the circuit diagram and find the expression of $V_o(t)$ assuming $R_2$ is replaced by a capacitor. [PYQ: 2016]
• Determine the output voltage of an Op-Amp with input voltages $V_{i1}=150\mu \text{V}$ and $V_{i2}=140\mu \text{V}$, a differential gain of $A_d=4000$, and a CMRR value of: (i) $100$, and (ii) $10^5$. [PYQ: 2016, 2018]
• Solve for the voltage gain, input resistance, and output voltage of a differential amplifier shown in Fig. 5(d) given: $R_1=R_3=680\Omega$, $R_F=R_2=6.8\text{ k}\Omega$, inputs $V_x=-1.5{\text{ V}}_{\text{pp}}$ and $V_y=-2{\text{ V}}_{\text{pp}}$ sine waves at $1\text{ Hz}$, assuming an initially nulled 741C Op-Amp. [PYQ: 2016]
• Solve for the gain and input resistance of a differential amplifier, and calculate the output voltage $v_o$ if $v_x=2.7{\text{ V}}_{\text{pp}}$ and $v_y=3{\text{ V}}_{\text{pp}}$ sine wave at $100\text{ Hz}$ given: $R_1=R_2=1\text{ k}\Omega ,R_F=R_3=10\text{ k}\Omega$, using a 741C Op-Amp. [PYQ: 2018]
• Analyze the circuit of Fig. 5(d) assuming an ideal Op-Amp to: (i) identify the feedback topology, (ii) calculate $v_o/v_i$, and (iii) relate the closed-loop gain with open-loop gain. [PYQ: 2019]
• Determine the output voltage $V_o$ in an Op-Amp based differential amplifier using an LM741 Op-Amp with a supply voltage of $\pm 15\text{ V}$. [PYQ: 2024]
• Determine the output voltage of an integrator and sketch its waveform given: $R_1{C}_F=1\text{ s}$ and the input is a step (DC) voltage as shown in Fig. 6(d). [PYQ: 2017]
• Draw the output voltage waveform of an integrator circuit given: input is a sine wave with peak-to-peak amplitude of $5\text{ V}$ at $1\text{ kHz}$, $R_1{C}_F=0.1\text{ ms}$, and $R_F=10R_1$, assuming the voltage across $C_F$ is initially zero. [PYQ: 2021]
• Design a differentiator circuit to process an input signal varying from $10\text{ Hz}$ to $1\text{ kHz}$. [PYQ: 2015, 2016, 2018, 2022] [Heavily Tested]
• Design a differentiator circuit that will differentiate an input signal with $f_{\max }=100\text{ Hz}$. [PYQ: 2021]
• Design a practical integrator circuit to process input sinusoidal waveforms up to $1\text{ kHz}$ given an input amplitude of $10\text{ mV}$. [PYQ: 2023]
• Design and draw a circuit diagram using an Op-Amp amplifier having three input signals of $1{\text{ V}}_{\text{pp}}$ at $100\text{ Hz}$ each to produce an output signal of $30{\text{ V}}_{\text{pp}}$ at $100\text{ Hz}$. [PYQ: 2018]

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Chapter 5: Wave Shaping Circuits (Comparators, Schmitt Triggers, Clippers & Clampers)

Definitions & Core Terminology

• Define a “Comparator Circuit.” [PYQ: 2023, 2024]
• Define “Schmitt Trigger” (regenerative comparator). [PYQ: 2015, 2017, 2020] [Heavily Tested]
• Define a “Clipping Circuit” (clipper) and state its primary electronic purpose. [PYQ: 2015, 2016, 2021] [Heavily Tested]
• Define a “Clamping Circuit” (clamper) and explain its DC-insertion function. [PYQ: 2018, 2020, 2021] [Heavily Tested]
• Define the terms “Upper Threshold Point” (UTP) and “Lower Threshold Point” (LTP).
• Define “Hysteresis Voltage” ($V_H$).

Core Principles & Explanations

• Explain the operating principle of a window detector (window comparator) and list its practical applications. [PYQ: 2019, 2022, 2023] [Heavily Tested]
• Explain how an Op-Amp comparator circuit can act as a voltage-level detector. [PYQ: 2019]
• Explain why a Schmitt trigger is known as a “regenerative comparator” and discuss its noise immunity. [PYQ: 2016, 2018]
• Explain how a Schmitt trigger converts an irregular-shaped input waveform into a square output pulse. [PYQ: 2025]
• Explain the input-output response of a Schmitt trigger with detailed hysteresis properties. [PYQ: 2015, 2017, 2020] [Heavily Tested]
• List the five basic uses of a comparator in analog signal processing. [PYQ: 2024]
• List the common applications of clippers and clampers in electronic systems. [PYQ: 2015, 2016, 2018, 2020] [Heavily Tested]

Derivations

• Derive the expressions for Upper Threshold Voltage ($V_{\text{UT}}$), Lower Threshold Voltage ($V_{\text{LT}}$), and Hysteresis Voltage ($V_H$) for an inverting Schmitt trigger circuit. [PYQ: 2025]

Proofs

• Prove that positive feedback in a Schmitt trigger forces the output to quickly snap between saturation levels ($\pm V_{\text{sat}}$) rather than operating linearly.

Comparison/Difference Tables

• Differentiate between a basic comparator and a Schmitt trigger in a comparison table. [PYQ: 2016, 2018]

Diagrams & Circuits

• Draw the circuit diagram of a $+10\text{ V}$ voltage-level detector using an Op-Amp. [PYQ: 2019]
• Draw the circuit diagram of a window comparator. [PYQ: 2022]
• Draw the circuit diagram of a Schmitt trigger. [PYQ: 2021, 2022, 2024, 2025] [Heavily Tested]
• Draw the hysteresis loop/curve for an inverting Schmitt trigger, clearly labeling UTP, LTP, and $V_H$. [PYQ: 2015, 2017, 2020] [Heavily Tested]

Algorithms & Procedures

• Follow the step-by-step procedure to analyze a multi-diode clipper circuit by: (i) identifying diode conduction states for positive/negative half-cycles, (ii) calculating transition threshold voltages, and (iii) plotting the exact output waveform aligned below the input waveform. [PYQ: 2015, 2016, 2017, 2018, 2019, 2020, 2021] [Heavily Tested]

Numericals & Calculations

• Draw the output waveshapes for the diode clipper circuits shown in Fig. 8(c) / Fig. 6(c), assuming ideal diodes and a sinusoidal input. [PYQ: 2015, 2016, 2017, 2018, 2019, 2020] [Heavily Tested]
• Draw the output waveshapes for the diode clamper circuits shown in Fig. 8(d) / Fig. 8(c) / Fig. 8(a), assuming ideal diodes, realistic time constants, and a sinusoidal input. [PYQ: 2016, 2019, 2021, 2022] [Heavily Tested]
• Draw the output waveform for the circuit shown in Figure 6(b) given an input of a $20{\text{ V}}_{\text{pp}}$ sinusoidal wave at $50\text{ Hz}$. [PYQ: 2024]
• Calculate the Upper Threshold Voltage (UTP), Lower Threshold Voltage (LTP), and Hysteresis Voltage ($V_H$) of a Schmitt trigger circuit, given that $R_1=R_2=5\text{ k}\Omega$ and output saturation voltage $\pm V_{\text{sat}}=\pm 14\text{ V}$. [PYQ: 2024, 2025]

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Chapter 6: Active Filters

Definitions & Core Terminology

• Define a “Filter” in electronic systems. [PYQ: 2024]
• Define the “Order of Filter” and explain its relationship with roll-off rate (dB/decade). [PYQ: 2015, 2016, 2017, 2019, 2023] [Heavily Tested]
• Define “Cut-off Frequency” ($f_C$) as applied to filters. [PYQ: 2016, 2017]
• Define “Transition Time.” [PYQ: 2015]
• Define “Settling Time.” [PYQ: 2015]
• Define “Symmetrical Triggering.” [PYQ: 2015]
• Define “Unsymmetrical Triggering.” [PYQ: 2015]
• Define a “Notch Filter.” [PYQ: 2015]
• Define the terms "$20\text{ dB/decade}$" and "$40\text{ dB/decade}$" roll-off in the stopband of a filter. [PYQ: 2018]

Core Principles & Explanations

• Explain the pros and cons of the Butterworth filter approximation compared to Chebyshev or Bessel types. [PYQ: 2017]
• List the key advantages of active filters over passive filters (no loading effect, easier tuning, elimination of heavy inductors, and voltage gain). [PYQ: 2015, 2016, 2019, 2023, 2024] [Heavily Tested]

Derivations

• Derive the gain magnitude ($|A_v|$) and phase angle ($\theta$) equations for a 1st order active Low-Pass Filter. [PYQ: 2021, 2023, 2025] [Heavily Tested]

Proofs

• Prove that a 1st order filter produces a roll-off of $20\text{ dB/decade}$ ($6\text{ dB/octave}$) in the stopband, while a 2nd order filter produces $40\text{ dB/decade}$ ($12\text{ dB/octave}$).

Comparison/Difference Tables

• Differentiate between band-pass and band-stop active filters in terms of frequency characteristics, passband, and stopband regions. [PYQ: 2016, 2017]

Diagrams & Circuits

• Draw the circuit diagram of a first-order active high-pass filter and plot its frequency response curve. [PYQ: 2021]
• Draw the ideal vs. practical frequency response curves for low-pass, high-pass, band-pass, and band-stop active filters. [PYQ: 2021, 2022]

Algorithms & Procedures

• Follow the step-by-step procedure of the “Frequency Scaling Technique” to convert a filter’s cutoff frequency from $f_{C1}$ to $f_{C2}$ by modifying capacitor or resistor values. [PYQ: 2021, 2022, 2023] [Heavily Tested]

Numericals & Calculations

• Design an active low-pass filter at a cut-off frequency of $1\text{ kHz}$ with a passband gain of $2$. [PYQ: 2016, 2018]
• Design an active high-pass filter at a cut-off frequency of $1\text{ kHz}$ with a passband gain of $2$. [PYQ: 2017, 2020]
• Design an active high-pass filter at a cutoff frequency of $1\text{ kHz}$ with a passband gain of $2$ and plot its frequency response curve, clearly labeling the cutoff region. [PYQ: 2022]
• Design a $20\text{ dB/decade}$ low-pass filter to have a cut-off frequency of $2\text{ kHz}$ and a passband gain of $1$. [PYQ: 2021]
• Design a second-order low-pass filter at a cutoff frequency of $1.2\text{ kHz}$. [PYQ: 2022]
• Design a low-pass filter at a cutoff frequency of $1\text{ kHz}$ with a passband gain of $2$. Then, use the frequency scaling technique to convert the cutoff frequency to $1.6\text{ kHz}$. [PYQ: 2021, 2022, 2023] [Heavily Tested]
• Design a wide band-pass filter with $f_L=200\text{ Hz},f_H=1\text{ kHz}$, and a passband gain of $4$. [PYQ: 2019, 2023]
• Design a wide band-pass filter with $f_L=200\text{ Hz},f_H=1\text{ kHz}$, and a passband gain of $4$, and calculate the $Q$-value of the filter. [PYQ: 2024]
• Design a wide band-pass filter with $f_L=200\text{ Hz},f_H=3\text{ kHz}$, and a passband gain of $3.5$, and calculate the $Q$-value of the filter. [PYQ: 2025]

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Chapter 7: Multivibrators and 555 Timers

Definitions & Core Terminology

• Define a “Multivibrator” and classify its modes (astable, monostable, bistable). [PYQ: 2015, 2017, 2019, 2022, 2024] [Heavily Tested]
• Define “Speed-up Capacitor” and explain its role in BJT switching acceleration. [PYQ: 2017]

Core Principles & Explanations

• Explain the operation of a transistor-based astable multivibrator. [PYQ: 2016]
• Explain the operation of a transistor-based bistable multivibrator. [PYQ: 2015, 2017, 2019] [Heavily Tested]
• Explain the operation of a transistor-based monostable multivibrator and list its applications. [PYQ: 2018, 2023]
• Explain the charging and discharging mechanisms in the astable operation of a 555 timer. [PYQ: 2025]
• Explain the voltage controlled oscillator (VCO) operation of a 555 timer using its block diagram. [PYQ: 2019]
• Explain how a $50\%$ duty cycle can be achieved in the astable operation of a 555 timer, showing the necessary circuit modifications and design equations. [PYQ: 2024, 2025]

Derivations

• Derive the expression for the output pulse width ($t_p=1.1RC$) of a 555 monostable multivibrator.
• Derive the expressions for positive pulse width ($t_c=0.693(R_A+R_B)C$), negative pulse width ($t_d=0.693R_{B}C$), and free-running frequency ($f_o$) of a 555 astable multivibrator.
• Prove that the charging voltage across the timing capacitor in a 555 astable circuit oscillates strictly between $V_{CC}/3$ and $2V_{CC}/3$. [PYQ: 2025]

Comparison/Difference Tables

• Differentiate between an oscillator and a multivibrator in terms of feedback type, operating states, and output waveforms. [PYQ: 2016]

Diagrams & Circuits

• Draw the complete internal block diagram of a 555 Timer IC (including resistors, comparators, flip-flop, and discharge transistor). [PYQ: 2016, 2017, 2018, 2020] [Heavily Tested]
• Draw the circuit diagram of a transistor-based bistable multivibrator. [PYQ: 2015, 2017, 2019] [Heavily Tested]
• Draw the circuit diagram of a transistor-based monostable multivibrator. [PYQ: 2018, 2023]
• Draw the circuit diagram of a 555 astable multivibrator. [PYQ: 2017, 2020]
• Draw the circuit diagram of a 555 monostable multivibrator. [PYQ: 2016, 2018, 2019] [Heavily Tested]

Numericals & Calculations

• Design a 555 astable multivibrator to yield a pulse repetition frequency (PRF) of $2\text{ kHz}$ and a duty cycle of $66\%$ given supply voltage $V_{CC}=18\text{ V}$. [PYQ: 2015]
• Determine the value of capacitance $C$ in a 555 monostable multivibrator given: $R_A=10\text{ k}\Omega$ and output pulse width $t_p=10\text{ ms}$. [PYQ: 2016]
• Determine the value of capacitance $C$ in a 555 monostable multivibrator given: $R_1=10\text{ k}\Omega$ and output pulse width $t_p=100\text{ ms}$. [PYQ: 2018]
• Determine the positive pulse width ($t_c$), negative pulse width ($t_d$), and free-running frequency ($f_o$) of the 555 astable multivibrator shown in Fig. 7(d) / Fig. 5(c) given: $R_A=2.2\text{ k}\Omega ,R_B=3.9\text{ k}\Omega$, and $C=0.1\mu \text{F}$. [PYQ: 2017, 2020]
• Analyze the 555 monostable circuit of Fig. 6(d) given: $V_{CC}=12\text{ V},R=33\text{ k}\Omega$, and $C=0.47\mu \text{F}$ to determine: (i) the minimum trigger voltage that produces an output pulse, (ii) the maximum capacitor voltage, and (iii) the width of the output pulse. [PYQ: 2019]

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Chapter 8: Phase Locked Loop (PLL)

Definitions & Core Terminology

• Define the term “Phase Locked Loop” (PLL). [PYQ: 2015, 2016, 2017, 2018, 2022, 2023] [Heavily Tested]
• Define “Capture Range” and “Lock-in Range” (Tracking Range) of a PLL.
• Define “Free Running Frequency” ($f_o$) of a Voltage Controlled Oscillator (VCO).

Core Principles & Explanations

• Explain the construction and operating principle of a Phase Locked Loop. [PYQ: 2015, 2017, 2018, 2019, 2022, 2023] [Heavily Tested]
• Explain the function of each sub-block in a PLL (Phase Detector/Comparator, Low Pass Filter, Error Amplifier, Voltage Controlled Oscillator). [PYQ: 2015, 2017, 2018, 2019, 2022] [Heavily Tested]
• List the applications of a PLL in communication systems (e.g., FM demodulation, frequency synthesis, FSK decoder, AM detection). [PYQ: 2016]

Diagrams & Circuits

• Draw the block diagram of a Phase Locked Loop (PLL). [PYQ: 2015, 2017, 2018, 2019, 2022, 2023] [Heavily Tested]

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Sources Referenced:

• Syllabus: ECE 2101 Course Contents pgs 1–2 (Op-Amps, Wave Shaping, Active Filters, Multivibrators, 555 Timers, Phase Locked Loops).
• Class Notes: Slide Presentations (1 Op-Amp Basics_.pdf, 2 Negative Feedback om-amp.pdf, 3 Arithmatic Applications_.pdf, 4 Op Amp Comparators_.pdf, 5 555 Timers_.pdf, 6 Filter _.pdf, 7 Clippers and Clampers.pdf) by Shafrin Alom mam / Aysha mam (Shafrin mam-2309008.pdf, Aysha mam-2309008.pdf).
• Reference Books: Ramakant A. Gayakwad, Op-Amps and Linear Integrated Circuits (Chapters 2, 3, 4, 7, 8, 9, 10); Albert Malvino, Electronic Principles 9th Edition (Chapters 18, 19, 20, 22).
• Previous Year Questions (PYQs): Verbatim exam sheets of Khulna University of Engineering & Technology (KUET) from 2015 to 2025.

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This completes the Master Study Checklist for both instructors! Use this roadmap as a rigorous, step-by-step target system. Good luck in aiming for that A+!