complementary power amplifier

Related Concepts: Lab 6 complement power analysis

Based on Laboratory Exercise 23: Complementary Power Amplifier from your manual, here is the revision note.

1) Experiment Snapshot

Experiment Title: Complementary Power Amplifier (Push-Pull Class AB)

Objective(s):

Identify a complementary push-pull circuit and measure DC operating voltages.
Demonstrate operation and measure voltage gain ( $A_{V}$ ) and power gain ( $A_{P}$ ).
Observe the elimination of crossover distortion using Class AB biasing.

Core Principle / Theory:

Complementary Symmetry: Uses one NPN ( $Q_{1}$ ) and one PNP ( $Q_{2}$ ) transistor.
Push-Pull Action: NPN conducts on the positive half-cycle; PNP conducts on the negative half-cycle. No output transformer is needed.
Class AB Operation: Both transistors are slightly forward-biased (approx 0.6V base-emitter) to prevent Crossover Distortion (the “dead zone” where neither conducts near zero crossing).
Efficiency: Higher efficiency than Class A because quiescent current is low.

Key Formula(s):

Voltage Gain: $A_{V} = \frac{e _{o}}{e _{i}} \approx 1$ (Common Collector configuration).
Output Power: $P_{O} = \frac{e _{o}^{2}}{R _{L}}$ (using rms voltage).
Input Power: $P_{I} = e_{i} \times i_{i}$
Power Gain: $A_{P} = \frac{P _{O}}{P _{I}}$

2) Apparatus Setup

Connection / Block Diagram:

Input: AF Generator $\to$ Resistor R1 ( $100Ω$ , for current sensing) $\to$ Capacitor C1 $\to$ Bias Network.
Bias Network: Voltage divider with $R 2, R 3, R 4, R 5$ sets base voltages for $Q_{1}$ and $Q_{2}$ .
Transistors: $Q_{1}$ (NPN) and $Q_{2}$ (PNP) emitters connected together. Collectors to rails ( $V_{CC}$ and Gnd).
Output: From Emitters $\to$ Coupling Capacitors ( $C 2∣∣ C 3$ ) $\to$ Load ( $R_{L} = 8.2Ω$ or Speaker).
Supply: $V_{CC} = 12 V$ DC.

Precautions:

Heat: Power transistors can get hot; ensure correct wiring to avoid thermal runaway.
Matching: Check that $Q_{1}$ is NPN and $Q_{2}$ is PNP.
Capacitor Polarity: C2 and C3 are electrolytic; observe polarity relative to the DC potential at the emitters (approx $V_{CC} /2$ ).

3) Procedure

Part A: DC Operation (Class AB Bias)

Connect the circuit (Fig 23-2). Use $8.2Ω$ resistor as load ( $R 8$ ).
Set Supply $V_{CC}$ to 12V DC. Input signal = 0.
Measure and record total DC current $I_{T}$ (no signal).
Measure DC voltages with respect to ground:
- $Q_{1}$ Base ( $V_{B 1}$ ), Emitter ( $V_{E 1}$ ), Collector ( $V_{C 1}$ ).
- $Q_{2}$ Base ( $V_{B 2}$ ), Emitter ( $V_{E 2}$ ), Collector ( $V_{C 2}$ ).
- Check: $V_{B 1}$ should be ~0.6V higher than $V_{E}$ ; $V_{B 2}$ should be ~0.6V lower than $V_{E}$ .

Part B: AC Gain & Power 5. Set AF Generator to 1kHz Sine Wave. 6. Adjust input to get 1V rms (approx 2.8V pk-pk) at the junction of R3/R4 ( $e_{i}$ ). 7. Connect Oscilloscope to Output ( $R_{L}$ ). Observe waveform. 8. Measure Output Voltage ( $e_{o}$ ) in rms. 9. Measure Voltage Drop across Series Resistor $R 1$ ( $e_{R 1}$ ) to calculate input current. 10. Calculate Voltage Gain ( $A_{V}$ ) and Power Gain ( $A_{P}$ ).

4) Data Taken / Measurements

Table Template:

Parameter	Condition	Instrument	Measured Value	Unit
DC Analysis
$V_{B 1}$ (NPN Base)	No Signal	VOM	~6.6	Vdc
$V_{E}$ (Common Emitter)	No Signal	VOM	~6.0	Vdc
$V_{B 2}$ (PNP Base)	No Signal	VOM	~5.4	Vdc
$I_{T}$ (Total Current)	No Signal	Ammeter	________	mA
AC Analysis
$e_{i}$ (Input)	1kHz Sine	VOM/Scope	1.0	$V_{r m s}$
$e_{o}$ (Output)	Across $8.2Ω$	VOM/Scope	________	$V_{r m s}$
$e_{R 1}$ (Drop on R1)	Across $100Ω$	VOM	________	$V_{r m s}$

5) Calculations

Input Current ( $i_{i}$ ): $i_{i} = \frac{e _{R 1}}{R 1} = \frac{e _{R 1}}{100Ω}$
Input Power ( $P_{I}$ ): $P_{I} = e_{i} \times i_{i}$
Output Power ( $P_{O}$ ): $P_{O} = \frac{e _{o}^{2}}{R _{L}} = \frac{e _{o}^{2}}{8.2}$
Power Gain ( $A_{P}$ ): $A_{P} = \frac{P _{O}}{P _{I}}$

(Manual Example: $P_{O} \approx 15 mW$ , $A_{P} \approx 32$ )

6) Results & Outcome

DC Bias: The emitters sit at approx half supply ( $V_{CC} /2 = 6 V$ ). Bases are biased $\pm 0.6 V$ relative to emitters.
Voltage Gain: $A_{V} \approx 0.98$ to $1.0$ (Unity gain).
Power Gain: High (typically > 30).
Waveform: Output is a clean sine wave. If biased incorrectly (Class B), “crossover distortion” (flat spots at zero crossing) would appear.

7) Why This Outcome Happens (Reasoning)

Voltage Follower: The circuit is essentially two Emitter Followers working in parallel (one for pos, one for neg cycle). Emitter followers have high current gain but unity voltage gain.
Crossover Elimination: Resistors $R 3$ and $R 4$ create a voltage drop between the bases of $Q_{1}$ and $Q_{2}$ . This “pre-biases” the transistors slightly ON, so there is no gap in conduction when the signal crosses zero.
Power Amplification: Since $Z_{in}$ is high (bases) and $Z_{o u t}$ is low (emitters), the circuit can drive a low impedance load ( $8Ω$ speaker) with significant current, resulting in power gain.

8) Viva / Lab Test Quick Prep

Q1: What is the main advantage of Complementary Symmetry amplifiers? A: They eliminate the need for bulky output transformers while providing push-pull operation.

Q2: What is Crossover Distortion? A: Distortion near the zero-crossing point of the signal caused by transistors being cut off until the input exceeds $V_{BE}$ (0.7V).

Q3: How is Crossover Distortion eliminated in this circuit? A: By using Class AB biasing—applying a small DC bias to keep transistors slightly conducting at idle.

Q4: Why is the voltage gain approximately 1? A: Because the configuration consists of Emitter Followers, which have unity voltage gain.

Q5: Why use two output capacitors (C2, C3) in parallel? A: To increase the total capacitance (100 $μ$ F) and lower the reactance at low frequencies, allowing better bass response for the speaker.

Q6: What is the phase relationship between input and output? A: In-phase (0 degrees).

Common Mistakes:

Shorting Bias: Accidentally shorting the bases together will remove the bias, causing severe crossover distortion.
Load: Forgetting to connect the $8.2Ω$ load will result in correct voltage readings but zero power output.

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