_ece lab quiz from manual

Related Concepts: Lab 6 complement power analysis | jfet lab report | lab 7 darlington

Laboratory Exercise 14: COMMON EMITTER CIRCUIT

1. When a transistor is used as a common-emitter amplifier it has its: Both (a) and (b) (Emitter to base junction forward biased AND Collector to base junction reverse biased). Explanation: For linear amplification in the active region, a bipolar junction transistor (BJT) must have its base-emitter junction forward-biased to allow carriers to flow, while the collector-base junction is reverse-biased to sweep carriers into the collector.

2. The input ac signal is applied between the: Base and ground or base and emitter. Explanation: In a common-emitter configuration, the input signal is introduced at the base terminal, and the emitter is treated as the common reference point (often tied to ground directly or via a bypass capacitor).

3. The output ac signal is taken between the: Collector and ground or collector and emitter. Explanation: The amplified output is measured at the collector terminal relative to the common emitter/ground reference.

4. The ac voltage gain is typically: More than unity. Explanation: The common-emitter amplifier is highly favored because it is capable of providing significant voltage and power amplification, with voltage gains well above 1.

5. The output impedance is: About the same as the collector resistor value. Explanation: The internal output impedance of the transistor is usually very large, so the overall output impedance of the common-emitter stage is primarily dictated by the physical collector resistor ($R_C$).

6. The ac output signal is: 180° out of phase with the input signal. Explanation: As the input voltage increases, the base current and collector current increase, causing a larger voltage drop across the collector resistor. This lowers the collector voltage, resulting in an inverted (180° phase-shifted) output signal.

Laboratory Exercise 15: COMMON COLLECTOR CIRCUIT

1. The common-collector circuit is used mainly as a: Impedance matching circuit. Explanation: The common-collector configuration features a very high input impedance and extremely low output impedance, making it ideal for matching a high-impedance source to a low-impedance load.

2. The input ac signal is applied between the: Base and ground. Explanation: The input is applied to the base, similar to the common-emitter, but the collector is tied directly to the DC supply (which is an AC ground).

3. The output ac signal is taken between the: Emitter and ground. Explanation: The load resistor is connected from the emitter to ground, and the output is taken across this emitter resistor.

4. The ac voltage gain is: Less than unity. Explanation: The common-collector circuit acts as an “emitter follower.” Because the output voltage follows the base voltage minus the small $V_{BE}$ drop, the voltage gain is always slightly less than 1.

5. The output impedance is: Low. Explanation: This configuration is designed specifically for its extremely low output impedance, allowing it to drive heavy loads without dropping the signal voltage.

6. The ac output signal is: In phase with the input signal. Explanation: Because it is an emitter follower, the emitter voltage tracks the input base voltage directly without inversion.

Laboratory Exercise 16: RC COUPLING

1. The voltage gain of a two-stage cascaded voltage amplifier is: Equal to the gain of the first stage times the gain of the second stage. Explanation: When amplifier stages are cascaded, the total overall voltage gain is the mathematical product of the individual loaded gains of each stage.

2. Adding an external load to the output of a two-stage RC coupled amplifier: Decreases the voltage gain. Explanation: The gain of any stage must be determined under loaded conditions; adding an external load draws current and acts in parallel with the output impedance, which inherently pulls down the overall voltage gain.

3. Adding an emitter bypass capacitor: All of the above (Increases frequency response, voltage gain, and emitter current). Explanation: A bypass capacitor acts as an AC short circuit, bypassing the emitter resistor for AC signals. This removes negative feedback, which significantly increases the AC voltage gain and alters the frequency response.

4. The load resistance for the ac signal at the collector of the first stage is: The collector resistor of the first stage in parallel with the input resistance of the second stage. Explanation: The AC equivalent circuit places the first stage’s collector resistor in parallel with the input impedance of the next stage, meaning the second stage actively “loads” the first stage.

5. An electrolytic capacitor used for coupling between stages: All of the above. Explanation: A coupling capacitor must have low reactance at AC operating frequencies to pass the signal, low DC leakage to successfully block the DC bias of one stage from interfering with the next, and proper polarity to prevent explosive failure.

6. The frequency response of a typical RC coupled amplifier: Is relatively flat over a range of audio frequencies. Explanation: The RC coupling capacitors act as short circuits in the midband range, creating a relatively flat gain across middle (audio) frequencies before dropping off at the low and high extremes.

Laboratory Exercise 18: DIRECT COUPLING

1. Direct coupling usually requires fewer components than used in: Both (a) and (b) (Resistor-Capacitor coupling AND Transformer coupling). Explanation: Direct coupling wires the output of one stage directly to the input of the next, eliminating the need for bulky coupling capacitors or isolation transformers.

2. Both PNP and NPN transistors can be used in direct coupled amplifiers: To make dc biasing easier. Explanation: Alternating NPN and PNP transistors allows the resting DC collector voltage of the first stage to serve directly as the necessary forward bias base voltage for the complementary second stage.

3. Direct coupling eliminates: All of the above (Inductive reactance, capacitive reactance, and resistive voltage dividers for second stage biasing). Explanation: Without capacitors or transformers, AC reactance between stages is completely removed, and the primary stage provides the DC bias naturally without extra voltage dividers.

4. The frequency response of a direct coupled amplifier is normally: Better than RC or transformer coupled amplifiers. Explanation: Because there are no coupling capacitors to limit low frequencies, a direct-coupled amplifier can amplify extremely low frequencies—even all the way down to 0 Hz (DC). (Note: If your original quiz key marks this as “Poorer”, verify your manual’s exact wording, but technically DC coupling improves low-frequency bandwidth).

5. The voltage gain of this direct coupled amplifier is: Greater than the transformer coupled amplifier. Explanation: Direct coupling avoids the inherent signal insertion losses introduced by inter-stage coupling components like transformers.

6. In direct coupling, a change in the dc bias of the first stage: All of the above (Changes the dc bias of the second stage, changes the collector voltage of the first stage, and is amplified by all stages). Explanation: Because the stages are physically wired together for DC, any drift in the DC level of the first stage acts as a valid input signal to the second stage and gets amplified throughout the chain.

Laboratory Exercise 6: MOSFET VOLTAGE AMPLIFIER

1. Depletion mode MOSFET’s are biased: Similar to JFET’s. Explanation: A depletion-type MOSFET has a physical channel built-in and can be biased using self-bias or voltage-divider bias in the depletion region (e.g., negative gate voltage for an N-channel), just like a JFET.

2. Some depletion mode MOSFET’s may be operated at zero bias because: They also have enhancement characteristics. Explanation: Unlike JFETs, depletion-type MOSFETs can operate with positive, zero, or negative gate voltages because they can function in both depletion mode (reducing current) and enhancement mode (increasing current) without drawing gate current.

3. If maximum voltage gain is desired from a depletion mode MOSFET, then: The source resistor should be bypassed. Explanation: Like the JFET and BJT, leaving a source resistor unbypassed introduces negative feedback. Bypassing it shorts out the AC resistance, raising the voltage gain.

4. If an enhancement mode MOSFET is to be used as a linear amplifier, then: The gate will require forward bias to turn it on. Explanation: Enhancement-type MOSFETs are “normally off.” A forward bias greater than the device’s threshold voltage ($V_T$) is strictly required to induce a channel and allow current to flow.

5. In a P-channel depletion type MOSFET: The gate must be biased positive to reduce channel current. Explanation: In a P-channel device, holes are the majority carriers. Applying a positive voltage to the gate repels the holes, depleting the channel and reducing the drain current.

6. One of the following statements is true: Neither (a) nor (b) (Gate bias neither increases nor decreases the input impedance of a MOSFET amplifier). Explanation: The input impedance of a MOSFET is naturally extremely high due to an insulating silicon dioxide ($Si{O}_2$) layer separating the gate from the channel, so varying the gate bias does not change this physical isolation.

Laboratory Exercise 23: COMPLEMENTARY POWER AMPLIFIER

1. A complementary power amplifier requires: Neither (a) nor (b) (Does not require two out-of-phase signals nor an input transformer). Explanation: A complementary push-pull design leverages opposing NPN and PNP transistors which naturally conduct on opposite half-cycles of the exact same input signal, avoiding the need for an input phase-splitting transformer.

2. A complementary power amplifier has: NPN and PNP transistors. Explanation: This push-pull layout stacks an NPN transistor and a PNP transistor together.

3. Complementary power amplifiers: Can produce push-pull operation. Explanation: The NPN transistor “pushes” current into the load on the positive half of the cycle, and the PNP transistor “pulls” current from the load on the negative half.

4. A complementary power amplifier operating in class AB: Is normally forward biased. Explanation: To eliminate “crossover distortion” (the dead zone where neither transistor is fully on), Class AB operation provides a slight forward bias (usually 1.2V - 1.4V via diodes) so both transistors idle slightly “on”.

5. The output impedance of a complementary power amplifier: Is relatively low. Explanation: Since the load is typically driven directly from the emitters of the transistors (acting as emitter followers), the output impedance is quite low, perfect for driving speakers.

6. Complementary power amplifiers are useful because: They eliminate the need for input and output transformers. Explanation: Because they use complementary NPN/PNP pairs and feature low output impedance, they do not require heavy, expensive transformers to split the phase or match load impedances.

Laboratory Exercise 15: DARLINGTON PAIR

1. Which of the following transistor connections would have the highest current gain? Darlington. Explanation: A Darlington pair cascades two transistors so that the emitter current of the first drives the base of the second, resulting in a multiplicative, exceptionally high overall current gain.

2. Two transistors are connected in a Darlington configuration. One has a beta of 75 and the other has a beta of 125. The beta of the Darlington circuit will be: 9375. Explanation: The total current gain (${\beta }_{total}$) of a Darlington pair is equal to the product of the individual gains (${\beta }_1\times {\beta }_2$): $75\times 125=9375$.

3. In a certain transistor a change in base current of two microamperes causes a change in collector current of 100 microamperes. The beta of the transistor is: 50. Explanation: The current gain ($\beta$) is the ratio of the change in collector current to the change in base current ($\frac{100\mu A}{2\mu A}=50$).

Laboratory Exercise 3: JFET VOLTAGE AMPLIFIER

1. One way to stabilize JFET circuits for variation in transistor characteristics is to use: Feedback. Explanation: Because JFET parameters like $I_{DSS}$ and $V_P$ vary widely, using a self-bias circuit introduces negative feedback, which stabilizes the DC operating point against these variations.

2. In a self bias circuit, the gate bias voltage is actually developed as a voltage drop across: The source resistor. Explanation: In self-bias, the current flowing down through the source resistor ($R_S$) elevates the source voltage. Because the gate is tied to $0V$, the voltage drop across $R_S$ makes the gate negative relative to the source ($V_{GS}=-I_D{R}_S$).

3. To prevent the input signal from forward biasing the gate-source diode in an N-channel JFET, one should: Make the gate negative with respect to the source. Explanation: For proper JFET operation and high input impedance, the internal PN junction must remain strictly reverse-biased, which means the gate must be kept negative relative to the source.

4. If the input signal to a JFET amplifier significantly exceeds the bias on the gate: All of the above (Gate current will flow, input impedance will be reduced, and distortion will result). Explanation: If the AC input swings high enough to overcome the negative DC bias, the gate-source junction becomes forward-biased. The gate begins drawing physical current, destroying the high input impedance and severely distorting the signal.

5. Bypassing the source resistor in a JFET amplifier: Raises the voltage gain. Explanation: A bypass capacitor effectively shorts out the source resistor for AC signals. This eliminates the negative AC feedback introduced by the resistor, maximizing the stage’s voltage gain.

6. Voltage gain in a JFET amplifier is dependent upon: All of the above (Transistor characteristics, the load resistance, and the gate bias). Explanation: The voltage gain depends directly on the transistor’s transconductance ($g_m$, which is dictated by the gate bias and device characteristics) multiplied by the effective AC load resistance ($R_D$).