Common emitter

Related Concepts: Bjt ac analysis book reference

Based on Laboratory Exercise 14: Common Emitter Circuit from your manual, here is the revision note.

1) Experiment Snapshot

Experiment Title: Common Emitter (CE) Circuit

Objective(s):

Calculate and measure DC operating voltages ( $V_{B}, V_{E}, V_{C}$ ).
Measure voltage gain ( $A_{V}$ ) with and without load.
Determine the phase shift between input and output signals.

Core Principle / Theory:

Configuration: Emitter is common to both input (Base-Emitter) and output (Collector-Emitter).
Biasing: Base-Emitter junction is forward biased; Collector-Base junction is reverse biased.
Amplification: CE amplifiers provide voltage gain greater than unity.
Phase: There is a 180° phase reversal between input and output voltage.
Impedance: Medium input impedance ( $1 k - 5 k Ω$ ) and medium output impedance ( $R_{C} \approx 10 k Ω$ ).

Key Formula(s):

Theoretical Base Voltage: $V_{B} = V_{CC} \times \frac{R 2}{R 1 + R 2}$
Voltage Gain: $A_{V} = \frac{e _{o u t}}{e _{in}}$
Approx. Gain (Unbypassed): $A_{V} \approx \frac{R _{C}}{R _{E}}$

2) Apparatus Setup

Connection / Block Diagram:

Input: AF Generator (Sine wave) $\to$ Capacitor C1 $\to$ Base of Q1.
Output: Collector of Q1 $\to$ Capacitor C2 $\to$ Oscilloscope / Load.
Supply: +24V DC ( $V_{CC}$ ) connected to top rail; Ground to bottom rail.
Components: NPN Transistor (2N2219A), Resistors ( $R_{C} = 10 k Ω$ , $R_{E} = 1 k Ω$ ), Capacitors ( $10 μ F$ ).

Precautions:

Polarity: Observe correct polarity for electrolytic capacitors C1 and C2 (negative side to lower potential).
Loading: Do not connect the load resistors (R5, R6) until instructed in the “Output Impedance” step.
Probe: Do not use a 10X attenuator probe for the low-level input signal measurements (use direct connection).

3) Procedure

Step-by-Step:

Part A: DC Operation

Connect the circuit (Fig 14-3). Leave load resistors R5 and R6 disconnected.
Adjust DC power supply ( $V_{CC}$ ) to 24Vdc. Ensure AC input $e_{i}$ is zero.
Measure and record DC voltages with VOM:
- Base to Ground ( $V_{B}$ )
- Emitter to Ground ( $V_{E}$ )
- Collector to Ground ( $V_{C}$ )

Part B: AC Gain Measurement 4. Set AF Generator to 1kHz Sine Wave. 5. Adjust AF Generator level to get 100mV pk-pk at the Base ( $e_{i}$ ). * Note: Use VOM 0.15V AC range or Oscilloscope (0.02V/cm, 0.5ms/cm). 6. Connect Oscilloscope to Collector (Output). Set vertical scale to 0.2V/cm. 7. Measure and record output voltage ( $e_{o}$ ) peak-to-peak. 8. Calculate Voltage Gain ( $A_{V}$ ).

Part C: Output Impedance 9. Connect R5 ( $4.7 k Ω$ ) and R6 ( $10 k Ω$ Pot) across the output. 10. Adjust R6 until the output voltage ( $e_{o}$ ) drops to one-half of the value measured in Step 7. 11. Disconnect R5/R6 network and measure their total series resistance. This equals the output impedance ( $Z_{o u t}$ ).

Part D: Phase Shift 12. Set Oscilloscope trigger to EXT TRIG (External Source). 13. Observe Input and Output traces. Compare the start of the positive cycles on the screen grid.

4) Data Taken / Measurements

Table Template:

Parameter	Condition	Instrument	Measured Value	Unit
DC Analysis
$V_{B}$ (Base)	$V_{CC} = 24 V$ , No AC	VOM	________	Vdc
$V_{E}$ (Emitter)	$V_{CC} = 24 V$ , No AC	VOM	________	Vdc
$V_{C}$ (Collector)	$V_{CC} = 24 V$ , No AC	VOM	________	Vdc
AC Analysis
$e_{i}$ (Input)	1kHz Sine	Scope/VOM	0.1 (approx)	$V_{pp}$
$e_{o}$ (Output)	Unloaded	Scope	________	$V_{pp}$
$R_{p o t}$ (Total)	When $V_{o u t}$ is halved	Ohmmeter	________	$Ω$

5) Calculations

Theoretical Gain (Quick Check): $A_{V} \approx \frac{R 3 ( C o ll ec t or )}{R 4 ( E mi tt er )} = \frac{10 k Ω}{1 k Ω} = 10$
Measured Gain: $A_{V} = \frac{e _{o} ( m e a s u re d )}{e _{i} ( m e a s u re d )} = \frac{1.0 V}{0.1 V} = 10$ (Example based on manual expected values).

6) Results & Outcome

DC Voltages:
- $V_{B} \approx 1.5 V$ (Derived from divider $150 k /10 k$ ).
- $V_{E} \approx 0.9 V$ ( $V_{B} - 0.6 V$ ).
- $V_{C} \approx 15 V$ .
AC Gain: The output voltage was approx 1.0V pk-pk for a 0.1V input, yielding a gain of 10.
Phase: The output waveform is 180° out of phase (inverted) relative to the input.
Output Impedance: Measured to be approx 10,000 $Ω$ (equal to Collector Resistor $R_{C}$ ).

7) Why This Outcome Happens (Reasoning)

Gain Value: The gain is approx 10 because, with an unbypassed emitter resistor ( $R_{E}$ ), negative feedback reduces the high beta gain to the ratio of $R_{C} / R_{E}$ .
Phase Reversal: When input voltage increases (positive), base current increases $\to$ collector current increases $\to$ voltage drop across collector resistor ( $R_{C}$ ) increases. Since $V_{o u t} = V_{CC} - I_{C} R_{C}$ , a higher drop means a lower output voltage.
Output Impedance: Looking into the collector, the transistor output resistance ( $r_{o}$ ) is very high, so the output impedance is dominated by the parallel collector resistor $R_{C}$ ( $10 k Ω$ ).

8) Viva / Lab Test Quick Prep

Q1: What is the phase relationship between input and output in CE? A: 180 degrees out of phase (inverted).

Q2: Which resistor determines the Output Impedance in this circuit? A: The Collector Resistor ( $R_{C}$ or R3).

Q3: How do you determine if the transistor is Forward Biased? A: Measure $V_{B}$ and $V_{E}$ ; $V_{B}$ should be approx 0.6V higher than $V_{E}$ for NPN.

Q4: Why is the voltage gain approx 10 in this experiment? A: Because the emitter resistor is unbypassed, Gain $\approx R_{C} / R_{E} = 10 k /1 k = 10$ .

Q5: What happens to the gain if we add a bypass capacitor across the emitter resistor? A: The gain increases significantly (maximum AC gain) because the AC degeneration is removed.

Q6: What junctions are Forward and Reverse biased? A: Emitter-Base = Forward; Collector-Base = Reverse.

Common Mistakes:

Wrong Scale: Reading 100mV as 1V on the scope (check probe attenuation).
Connections: Swapping Collector and Emitter leads (check flat face/tab of transistor).
Grounding: Forgetting to connect the scope ground to the circuit ground.

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